NVIDIA to Make Core Logic for Transmeta Efficeon Processors

Here’s a snip from Anton Shilitov’s take on NVIDIA’s collaboration with Transmeta:

As for system I/O controller, NVIDIA also does not need to invent it from the beginning. Currently the co is supplying its nForce3 150 chipsets with integrated PCI, USB 2.0, Parallel ATA-33/66/100/133, 10/100Mb/s Ethernet controller, AC’97 audio and other important functions, such as AGP controller. For Transmeta Efficeon platform the company may offer something very similar, as both Efficeon and AMD Opteron/Athlon 64 processors use the HyperTransport links as PSB. It is possible that a version of NVIDIA’s C8000 core-logic will also have an integrated graphics core as well.

Transmeta Efficeon, the successor of Crusoe, is based on 256-bit VLIW architecture. The CPU is able to perform 8 instructions per clock thanks to the 256-bit VLIW architecture in contrast to 4 instructions performed by Crusoe microprocessors. Transmeta’s Efficeon processor will be manufactured using 0.13 micron process from TSMC and its core clock will be about 1.40GHz at the launch.

NVIDIA to Make Core Logic for Transmeta Efficeon Processors @ x-bit labs